The field of Technology for Computer-Aided Design (TCAD), the capabilities to model essential technology-dependent device parameters for ICs, has roots that date to the 1960's with strong connections to the circuit simulation world and SPICE as the tool that defined that field. Since the 1970's Stanford University has played a key role in IC modeling and simulation of processes and devices, largely through the creation and broad dissemination of programs such as SUPREM and PISCES which have supported both academic and industrial developments in the field. Over this period, there have been an impressive array of developments worldwide that have pushed the frontiers of TCAD. This meeting celebrates the collective progress and success in the field, through a set of invited talks by leading experts in the field.
This year's meeting continues the tradition of presentations that show important trends and developments in the TCAD field. However, the meeting will emphasize the broader context of major activities across the US and European communities--both academic research and commercial suppliers. In addition to historic, evolutionary and even revolutionary perspectives on process simulators such as SUPREM (now 20 years young!), there will be strategic focus on calibration and supporting metrology. Moreover, the trends in new simulators (PROPHET, FLOOPS, ALAMODE...) as well as emphasis on experimental validation (PREDICT, SEMATECH "benchmarking"...) should give attendees a comprehensive view of progress in the process modeling arena. With the growing importance of lithography and patterning, key developments and trends in these areas (SAMPLE, SPEEDIE...) will be reviewed. In the device modeling area, the presentations will span moments based formulations to the Boltzmann Transport Equations (FIELDAY, MINIMOS, PISCES...) through Monte Carlo solutions approaches (DAMOCLES for carrier transport and UT-MARLOWE for ion implantation). At the circuit level, this year's meeting also critically reviews progress in compact modeling of devices and interconnects (SPICE, BSIM3, FASTCAP...) as well as commercial extraction tools to support circuit designers (UTMOST, ICCAP...). The cover's announcement gives a listing of the many tools to be considered over these two days; the following pages give more specific titles of the talks and affiliations of the speakers.
The meeting format is a combination of lectures and demonstrations. Copies of speaker slides are provided for easy reference. Coffee breaks and meals as listed are included in the registration fee and provide excellent opportunity to interact with speakers and other participants.
The first day's agenda includes a broad panorama of both process and device modeling. Several speakers have experience that spans TCAD research and industrial application. Hence, there will be a mixture of user perspective as well as detailed discussion of physical models and their limitations. There is a spectrum of tools and approaches considered, ranging from several generations of SUPREM and innovations representing an exciting and diverse set of viewpoints. The discussions of device simulation and modeling are especially interesting both from the point of view of evolution in the field and the synergistic benefits of pervasive use across a diverse set of applications. Since the overall format of the meeting is driven by invited speakers, many of the details of tools, models and applications will be covered through a poster board session at the end of the first day and held immediately prior to the meeting reception.
The second day continues the discussion of process modeling with a special session dedicated to metrology and calibration. The ongoing progress in achieving high resolution doping profiles and even atomic scale images of IC structures will be highlighted. The device modeling emphasis on the second day shifts towards the behavior level (SPICE and above), with focus on compact models and supporting extraction tools. At the close of the formal sessions on the second day, there will be "hands-on" software demonstrations in an informal atmosphere where developers, suppliers and users can interact and share common experiences. In keeping with growing acceptance and use of the world-wide web (WWW), there will be emphasis given to new paradigms for simulator access, internet collaborations and even electronic publishing.
BREAK
LUNCH
BREAK
BREAK
LUNCH
BREAK
Dimitri A. Antoniadis, Professor, MIT
John C. Bravman, Professor, Stanford University
Timothy S. Cale, Professor, Arizona State University
Robert W. Dutton, Professor, Stanford University
Charles Evans, President, Charles Evans & Associates
Richard B. Fair, Professor, Duke University
Wolfgang Fichtner, Professor, Swiss Federal Inst. of Technology
Peter B. Griffin, Senior Research Associate, Stanford University
Shawn Hailey, President, Meta Software
Chenming Hu, Professor, University of California, Berkeley
Jeff Johnson, Advisory Engineer, IBM Corporation
Michael Kump, TCAD Program Manager, Sematech
Mark Law, Professor, University of Florida
Steven Laux, Research Staff Member, IBM Corporation
Jim McVittie, Senior Research Associate, Stanford University
Andy Neureuther, Professor, University of California, Berkeley
Ivan Pesic, President, Silvaco International
Marc Petersen, Product Marketing Manager, HP EEsof
Mark Pinto, Director, Silicon Electronics Research Lab, Bell Laboratories
Calving F. Quate, Professor, Stanford University
Conor Rafferty, Distinguished Member of Technical Staff, Bell Laboratories
Juan Rey, Manager, Lithography and Topography Dev't, Technology Modeling Associates
Siegfried Selberherr, Head, Institute for Microelectronics, Technical University Vienna
Al F. Tasch, Professor, University of Texas at Austin
Jacob White, Professor, Massachusetts Institute of Technology
Dan Yergeau, Research Assistant, Stanford University
Zhiping Yu, Senior Research Associate, Stanford University
Location: Hewlett-Packard Auditorium, Gates Computer Science Building.
Fee: The fee for each day is $250 including lecture notes, luncheon, and reception (August 7, 1996) or $425 for both days. Enrollment is limited, and advanced enrollment is required.
How to enroll: Please complete and return the registration form. Enrollment may be made by individuals or companies. Deadline for submission of enrollment forms: August 2, 1996.
Refunds: If you enroll and cannot attend, a refund will be granted if requested in writing prior to August 2, 1996.
Housing: A block of rooms has been reserved at the Stanford Terrace Inn (415) 857-0333. Housing is also available on the Stanford campus residences at reasonable rates. Campus recreational facilities are available for your use. For further information, contact the Conference Office at 123 Encina Commons, Stanford, CA 94305-6020; telephone (415) 725-1429. A list of hotels and motels in the vicinity of Stanford University can be provided upon request.
For further information: Write or call Stanford University Integrated Circuits Laboratory, c/o Robert W. Dutton, CISX 333, Stanford, CA 94305-4075; telephones (415) 723-1950 and 723-1349; FAX (415) 725-7731; or send e-mail to cad96@gloworm.stanford.edu. Please refer to the Stanford University home page for more information about the campus as well as downtown Palo Alto.
Make check payable to Stanford University, and send to:
Professor Robert W. Dutton
CISX 332, Stanford University,
Stanford, CA 94305-4075.