Layout-Based 3-D Solid Modeling of IC Structures and Interconnects
Including Electrical Parameter Extraction
A suite of software tools have been developed to model IC structures
including interconnects based on layout
design and processing information. The modeling capabilities
include 3-D rendering of solid objects, surface meshing, electrical
parameter (mainly capacitance) extraction for arbitrarily shaped
objects. This software ensemble provides a direct link between
design parameters and electrical performance. Analysis of a four
transistor SRAM cell is used as an example.
A paper was presented at
1998 IEEE International Conference on Simulation of Semiconductor
Processes and Devices
(SISPAD'98, Sept. 1998).
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