POSTER BOARDS 


Program for: Monday, September 8, 1997 
	     Tuesday, September 9, 1997
             Wednesday, September 10, 1997
Tuesday, September 9
P-1 "Molecular Dynamics Simulations of LATID Implants into Silicon"
P. Oldiges, H. Zhu and K Nordlund*,
Digital Equipment Corporation, Hudson, MA and University of Illinois at Urbana-Champaign, Urbana, IL
P-2 "Modeling Reverse Short Channel and Narrow Width Effects in Small Size MOSFET's for Circuit Simulation"
Y. Cheng, T. Sugii* and C. Hu,
UC Berkeley, Berkeley, CA and Fujitsu Laboratories, Atsugi, Japan
P-3 "Neutron-Induced Soft Error Simulator and Its Accurate Predictions"
Y. Tosaka, S. Satoh and T. Itakura,
Fujitsu Laboratories, Ltd., Atsugi, Japan
P-4 "A Computationaly Efficient Technique to Extract Diffused Profiles and Three Dimensional Collector Resistances of High Energy Implanted Bipolar Devices"
S. Chaudhry, Y.F. Chyan, M.S. Carroll, A.S. Chen, W.J. Nagy, J.L. Lee, K.H. Lee, P.A. Layman, F.A. Stevie,
C.S. Rafferty and H.H. Vuong, Lucent Technologies, Orlando, FL and Murray Hill, NJ
P-5 "Accurate Models for CMOS Scaling and Gate Delay in Deep Submicron Regime"
K. Chen, C. Hu, P. Fang*, Ashawant Gupta*, M. R. Lin* and Don Wollesen*,
UC Berkeley, Berkeley, CA and Advanced Micro Devices, Sunnyvale, CA
P-6 "MOSQue: A Novel TCAD Database System with Efficient Handling Capability on Measured and Simulated Data"
T. Tatsumi, H. Ohtani, S. Takahashi, S. Shimizu, M. Mukai and Y. Komatsu,
Sony Corporation, Kanagawa, Japan
P-7 "A Simplified Hydrodynamic Impact Ionization Model Based on the Average Energy of Hot Electron Subpopulation"
T.-W. Tang and J. Nam,
University of Massachusetts, Amherst, MA
P-8 "Systematic Calibration of Process Simulators for Predictive TCAD"
H. Park, M. Bafleur, L. Borucki, C. Sudhama, T. Zirkle and A. Wild,
Motorola, Inc., Mesa, AZ
P-9 "Breakdown Characterisation of HEMTs and MESFETs Based on A New Thermally Driven Gate Model"
L. Albasha, C. M. Snowden and R. D. Pollard,
University of Leeds, UK
P-10 "Modeling the Effect of Carbon on Boron Diffusion"
H. Rucker, B. Heinemann, W. Ropke, G. Fischer, G. Lippert and H.J. Osten,
Institute for Semiconductor Physics, Frankfurt, Germany
P-11 "Modeling of Polymer Neck Generation and Its Effects on the Etch Profile in Oxide Contact Hole Etching Using Ar, CHF3, and CF4 Gases"
J. Park, H. J. Lee, J.-T. Kong and S. H. Lee,
Samsung Electronics, Kyungki-Do, Korea
P-12 "Investigation of time-integration and multigrid techniques for nonequilibrium phosphorous diffusion modeling"
A. L. Pardhanani, and G. F. Carey,
University of Texas, Austin, TX
P-13 "A Boundary Conforming Mesh Generation Algorithm for Simulation of Devices with Complex Geometry"
V. Moroz, S. Motzny and Klas Lilja,
Technology Modeling Associates, Sunnyvale, CA
P-14 "Three-Dimensional Simulation of Conventional and Collimated Sputter Deposition of Ti Layers into High Aspect Ratio Contact Holes"
E. Bar, J. Lorenz* and H. Ryssel*,
Universitat Erlangen-Nurnberg and *Fraunhofer, IIS, Erlangen, Germany
P-15 "Three-dimensional Modeling of the TED due to Implantation Damage"
J. Lee, S. Yoon, Y. Kim, T. Won, J. C. Kim* and D. H. Lee*,
Inha University, Inchon, Korea and *Hyundai Electronics, Korea
P-16 "Assessment of a MOSFET Circuit Model as a Tool for Device Design Down to 0.05 um"
S. Biesemans and K. De Meyer,
IMEC, Leuven, Belgium
P-17 "A Computationally Efficient Ion Implantation Damage Model and Its Application to Multiple Implant Simulations"
S. Tian, Al F. Tasch, G. Wang, M. Morris, S. Morris, B. Obradovic, A. Tasch, H. Kennel*, P. Packan*, C. Magee**, J. Sheng**, R. Lowther*** and J. Linn****, C. Snell****,
University of Texas, Austin, TX, *Intel Corp, Aloha, OR,
**Charles Evans & Associates, Plainsboro, NJ and Redwood City, CA,
***Harris Semiconductor, Melbourne, FL and
****Los Alamos National Laboratory, Los Alamos, NM
P-18 "Integrated Statistical Process and Device Simulation System with Automatic Calibration using Single-Step Feedback and Backpropagation Neural Network"
V. M.C. Chen, Y.-T. Lin and Y.-K. Peng,
Advanced Micro Devices, Sunnyvale, CA
P-19 "Two-dimensional Device Simulator for Cyclic Bias Application"
Y. Ohno, Y. Takahashi,
NEC Corporation, Tsukuba, Japan
P-20 "Grid Size Independent Model of Inversion Layer Carrier Mobility"
T. Enda and N. Shigyo,
Toshiba Corporation, Yokohama, Japan
P-21 "Modeling Nonparabolicity Effects in Silicon Inversion Layers"
C. Troger, H. Kosina and S. Selberherr,
TU Vienna, Vienna, Austria
P-22 "Gridding Techniques for the Level Set Method in Semiconductor Process and Device Simulation"
E. C. Kan, Z.-K. Hsiau, V. Rao and R. W. Dutton,
Stanford University, Stanford, CA
P-23 "AMIGOS: Analytical Model Interface & General Object-Oriented Solver"
M. Radi, E. Leitner, E. Hollensteiner and S. Selberherr,
TU Vienna, Vienna, Austria
P-24 "Interactions of Fluorine Redistribution and Nitrogen Incorporation with Boron Diffusion in Silicon Dioxide"
M. Navi and and S. Dunham,
Boston University, Boston, MA
P-25 "Rigorous Topography Simulation of Contamination to Defect Transformation"
X. Li, A. Strojwas, A. Swecker, L. Milor*, and Y.-T. Lin*,
Carnegie Mellon University, Pittsburgh, PA and *Advanced Micro Devices, Sunnyvale, CA
P-26 "Assessment of Accuracy Limitations of Full Band Monte Carlo Device Simulation"
F. Venturi and A. Ghetti*,
University of Parma, Parma, Italy and University of Bologna, Bologna. Italy
P-27 "2-Dimensional Simulation of FN Current Suppression Including Phonon Assisted Tunnelling Model in Silicon Dioxide"
K. Eikyu, K. Sakakibara, K. Ishikawa, T. Nishimura,
Mitsubishi Electric Corporation, Hyogo, Japan
perea@gloworm.stanford.edu