JUNG-SUK GOO

Office : One AMD Place, P.O. Box 3453 M/S 79, Sunnyvale, CA 94088
Phone (408) 749-6100 FAX (408) 749-3851
goojs@gloworm.stanford.edu jung-suk.goo@amd.com

Jung-Suk Goo was born in Seoul, Korea, in 1966. He received his BS degree from Yonsei University, Seoul in 1988, and the MS and PhD degrees from Stanford University, CA, in 1997 and 2001, respectively.
From 1988 to 1989, he was with GoldStar Semiconductor, Co., Korea, involved in EPROM and 4M DRAM projects. And then he was with LG Semicon, Co., Korea, until 1995. During this period, he was engaged in next generation DRAM development such as 64M and 256M, and also was involved in a Flash memory project. His primary research areas were DRAM process development, device evaluation, and reliability modeling, in particular the hot carrier effects.
He has authored and co-authored over 45 journal and conference papers and holds 9 US patents. During his graduate study, he worked on nano-scale MOSFET modeling, high-frequency noise modeling, and CMOS low noise amplifier design. Upon graduation, he spent the summer with the Strategic Technology Group of AMD in Sunnyvale, working on nano-scale MOSFET technology development. In 2001, he was shortly with Atheros Communications, Inc. in Sunnyvale, engaged in IEEE 802.11a chipset development. In 2002, he rejoined the Strategic Technology Group of AMD. Currently he is a Sr. Member of Technical Staff of the Compact Modeling & Characterization Group, leading adavanced characterization and history-effect modeling thrusts for PD-SOI CMOS.

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