Choshu Ito's Work
Postdoctoral Research:
Development of fast model extraction methodology for RF power amplifier devices
Traditionally, the development of RF power amplifiers relied primarily
on measurements for verification of designs. This is due to the fact
that the metrics used to characterize RF power amplifier performance
are difficult to obtain through other methods. This work circumvents the
fabrication step by generating circuit models from device simulation.
Analysis and minimization of distortion in RF power amplifiers
Due to the narrow bandwidths seen in spectrum allocation for wireless
communications, linearity is a very important characteristic for RF
power amplifiers. This work identifies the dominant causes of distortion,
especially the third order intermodulation distortion, and demonstrates
methods to minimize this distortion.
Design of CMOS low-noise amplifiers (LNAs) for wireless communications
with ESD protection
An ESD/RF co-design methodology is being developed to facilitate better ESD
designs for use in RF systems. With a UMTS LNA as a test vehicle, the effect
of ESD protection on the LNA performance will be quantified, and guidelines
to minimize this effect will be presented.
Development of SiGe models for device simulation
With increased use of SiGe in high-speed devices, the importance of accurate
device simulation for SiGe is also increasing. This work calibrates the SiGe
model for a buried-channel strained-SiGe p-MOSFET, and its noise
characteristics will be investigated.
Graduate Research:
Investigation of device size effects in RF power amplifier systems
As device size (channel width) of an RF power amplifier device increases,
the output power available per unit width decreases. This phenomenon is
explained through development of an electromagnetic model, and circuitry
was developed to remedy the decreased performance.
Design of ESD protection systems for RF and high-speed digital applictions
For systems operating at high frequencies, the capacitive loading caused by ESD
protection systems causes unacceptable performance degradation. By applying
distributed ESD protection, it was shown that the effect on the signal under
normal operation could be minimized.
Development of bidirectional substrate noise models for mixed-signal applications
In mixed-signal applications, the analog sub-systems are affected by substrate noise
generated by the digital sub-systems. The goal of this project is to develop a compact model
for the substrate which may be used not only as an analysis tool, but also as a design tool to
minimize the effect of substrate noise on sensitive systems.
Publications:
C. Ito, K. Banerjee, and R. W. Dutton, "Analysis and Design of ESD Protection Circuits for High-Frequency/RF Applications," Proc. ISQED, 2001, pp. 117-122.
C. Ito, K. Banerjee, and R. W. Dutton, "Analysis and Optimization of Distributed ESD Protection Circuits for High-Speed Mixed-Signal and RF Applications," Proc. EOS/ESD Symp., 2001, pp. 355-363.
C. Ito, K. Banerjee, and R. W. Dutton, "Analysis and Design of Distributed ESD Protection Circuits for High-Speed Mixed-Signal and RF ICs," Trans. Electron Devices, vol. 49, no. 8, pp. 1444-1454, 2002.
C. Ito, T. Fujioka, I. Yoshida, R. W. Dutton, "Performance Improvement in Larger RF LDMOSFET Power Amplifiers," Proc. Asia-Pacific Microwave Conference, 2002.
C. Ito, "Analysis, Design, and Optimization of Integrated High-Current Devices in High-Speed and Radio-Frequency Semiconductor Systems," Ph.D. Dissertation, Stanford University, 2003.
Choshu Ito
CISX 305
Stanford University
Stanford, CA 94305
Last modified: April 18 23:20:49 PDT 2004