Efficient Timing and Power Model Generation

Efficient Generation of Fast and Accurate Timing and Power Models Using Optimized Polynomial Equations

Gaofeng Wang and Runip Gopisetty

Synopsys, Inc.

700 East Middlefield Road

Mountain View, CA 94043

Key Terms:

Timing, power, polynomial model, adaptive domain decomposition, QR factorization, optimization, Householder transform

Abstract:

A new scheme is presented for generating optimal timing and power models, which can speed up timing and power analyses with full accuracy in system-on-chip (SoC) designs. In this scheme, the nonlinear multi-dimensional timing and power lookup tables in semiconductor libraries are transformed into optimized (piecewise) polynomial equations in an efficient and accurate manner. The transform problem is mathematically defined as a least square problem, which is efficiently solved by a set of robust numerical algorithms. These optimized polynomial equations are then represented using the delay and power calculation language (DPCL), which can be complied into object code and used by various EDA tools.

Remarks:

A patent application was filed in the U.S. Patent Office based on this work.

A conference paper {pdf} based on this work was presented in 1999 12th Annual IEEE International ASIC/SOC Conference, Washington, DC, September 15-18, 1999.