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A. Kawamoto, J. Jameson, K.
Cho, and R.
Dutton, "Challenges for atomic scale modeling in alternative gate stack
engineering," accepted (April 2000) for publication in IEEE
Transactions on Electron Devices special issue, Computational Electronics:
New Challenges and Directions (November 2000).
This page last modified on 06/06/00 03:12 PM. |