Due to denser and larger chips and higher clock rates, effects of on-chip interconnects are becoming a limiting factor to the performance of integrated circuits. Metal-insulator-semiconductor (MIS) interconnects, being one of the most elementary components in the modern integrated circuits, have been of fundamental interest. Slow-wave properties and electronic controllability of such interconnects can be employed to reduce the size and cost of distributed elements to implement delay lines, variable phase shifters, voltage-tunable filters, etc. On the other hand, interconnect effects such as losses, dispersion, and substrate noise and nonlinearity may degrade the circuit performance.

Most existing approaches for analysis of MIS interconnects are solely based on Maxwell's equations, in which semiconductor substrates are modeled as lossy media. The nonlinear nature of semiconductor substrates has been generally ignored by previous research. In order to understand mechanisms behind various effects such as field-carrier interactions, substrate noise, semiconductor nonlinearity, losses, dispersion, slow-wave effect, and external bias effect, it is necessary to describe the behavior of semiconductor as solid state plasma without any linearization. In this thesis, a device level frequency domain (DLFD) simulation scheme is first proposed for studying wave propagation along MIS interconnects. Based on the device level simulation, a rigorous circuit extraction scheme is then introduced for modeling MIS interconnects through an energy-based approach.

In the device level simulation, the nonlinearity of semiconductor substrates is included by combining the nonlinear motion equations of charged carriers and Maxwell's equations. The set of combined nonlinear equations is then transformed into the frequency domain, which leads to sets of nonlinear equations for the fundamental mode and its harmonics. Finally, the sets of nonlinear equations in the frequency domain are discretized using the finite element method and solved using Newton's iterations. Special numerical enhancements are implemented to speed up the computational convergence and handle the boundary layer nature of the problem under study. This device level simulation provides knowledge on field-carrier interactions, semiconductor substrate loss and nonlinearity, as well as slow-wave effect, external bias effect, and screening effect of charged carriers. In particular, this device level simulation enables a rigorous full wave study of nonlinearity effects that arise from semiconductor substrates.

Based on the device level simulation results, a rigorous circuit model of MIS interconnects is extracted using an energy-based approach. This new equivalent circuit model consists of an equivalent transmission line, which mimics the energy transport characteristics of the actual MIS interconnect. Moreover, the new equivalent circuit model, which retains information about the semiconductor substrate effects obtained from the device level simulation, provides a generalized nonlinear and electronic tunable circuit model suitable for both small-signal and large-signal analyses.

Numerical examples for practical material and geometrical parameters are included to illustrate capabilities and efficiency of both the proposed device level simulation and circuit extraction schemes. Good agreements can be observed between the results obtained from the proposed schemes and those from the measurements or the published data from previous research.