Finite Element Formulation for the Hydrodynamic Semiconductor Device Equations

Semiconductor device simulation has been an active area of research for over two decades. Continued device miniaturization has pushed geometry sizes to below 0.3 micron, leading to ever higher electrical fields. It is widely accepted that the assumption of a simple linear relationship between carrier velocity and local electric field is no longer reasonable. Instead, a model that can explicitly deal with the carrier-heating phenomenon is needed. One powerful model that treats the carrier heating phenomenon is the Hydrodynamic (HD) model [1]. Simulations employing the HD model require numerical schemes that are stable, robust, and accurate. Most codes reported to date lack in at least one of these areas. In this study, a general space-time Galerkin/Least-Squares (GLS) finite element method is employed to simulate the HD model.

A strong similarity has been observed between the HD model for a single carrier device and the Compressible Euler and Navier-Stokes equations of fluids. In its standard form, the system of HD equations is non-symmetric and nonlinear. The system can be symmetrized by employing a generalized entropy function. We developed a GLS finite element formulation based on the symmetrized HD equations [2]. Numerical simulations are performed to demonstrate the robustness of the formulation for single carrier and two carrier semiconductor devices. Numerical simulations employing the HD model are computationally very intensive. In this work, the GLS finite element method has been implemented on a parallel Intel Hypercube computer.

[1] C. L. Gardner, J. W. Jerome and D. J. Rose, "Numerical methods for the hydrodynamic device model: subsonic flow", IEEE Transactions on CAD, Vol. 8, pp. 501-507, 1989.

[2] N. R. Aluru, A. Raefsky, P. M. Pinsky, K. H. Law, R. J. G. Goossens and R. W. Dutton, "A finite element formulation for the hydrodynamic semiconductor device equations", Comp. Meth. Appl. Mech. Engg., Vol. 107, pp. 269-298, 1993.

Narayana Aluru (aluru@gloworm.Stanford.EDU)
AEL 231
Integrated Circuits Laboratory
Stanford University
Stanford, CA 94305-4055