Electrothermal Simulation of SOI Devices and Full Chip

Electrothermal Simulation of 3D SOI MOSFET

Figure 1 Lattice Temperature Distribution
Figure 2 Electron Profile under Bias

Full Chip Thermal Simulation

Movie 1
Movie 2
Movie 3

Paper to be presented in ISQED -- Int'l Symposium on Quality of Electronic Design, March 2000 (note: to print the file, acroread v.4 is required and the PostScript level in the print menu has to be set to 2) Full Chip Thermal Simulation

Electrothermal Simulation of 3D SOI MOSFET

Figure 1 Lattice Temperature Distribution Figure 2 Electron Profile under Bias

Full Chip Thermal Simulation

Paper to be presented in ISQED -- Int'l Symposium on Quality of Electronic Design, March 2000 (note: to print the file, acroread v.4 is required and the PostScript level in the print menu has to be set to 2) Full Chip Thermal Simulation

Figure 1 Lattice Temperature Distribution
Figure 2 Electron Profile under Bias