PISCES code development - During this contract we have developed, implemented and tested a new coupled energy transport model in PISCES that allows for modeling of both the carrier and lattice temperatures in a single code. Major new capabilities in PISCES 2ET include: 1) Energy transport model to provide information for carrier temperatures, 2) Simulate thermal diffusion in the substrate to include the effect of lattice temperature variation, 3) Extensive surface mobility models for MOSFET simulation including Lombardi's model, 4) Capability of simulating heterostructure devices including HBTs and HFETs, 5) Robust and accurate high-frequency AC analysis, 6) Compatibility with Intel's improvements to PISCES.
In order to maintain compatibilty with the heterostructure capabilities (developed under support from ARO and ARPA) we have included the ability to handle virtual nodes and thermionic emission. In the course of this work we have explored in some depth the role of dependent and independent variables with regards to quantities such as mobility and impact ionization. Improvements in the silicon MOS mobility model are discussed below. In the case of GaAs devices with negative differential mobility, we implemented a model that uses an energy dependent formulation and the results were presented at VPAD [1]. Moreover, the general features of the ET and DUET models have been presented at SISDEP [2] and TECHCON [3].
The development of robust curve-tracing algorithms and means to calibrate device simulators, especially for cases where complex behavior of the I-V data affect simulator convergence, has resulted in major improvements in PISCES convergence and efficiency. A technical paper on the curve-tracing algorithms has been accepted for publication [4]. In addition we have initiated collaboration with AMD to apply advanced device modeling capabilities and curve-tracing to the analysis of device breakdown under the conditions of ESD.
MOS mobility modeling---We have incorporated a newly-proposed local mobility in PISCES that accurately models transverse field mobility over a wide range of channel doping, oxide thickness, temperature and back-gate bias, based on the underlying formulation of Lombardi. This has required the modification of PISCES to correctly account for local electric field effects. Based on code enhancements received from Intel the basic improvements to PISCES were extended to achieve the full implementation of the Lombardi formulation. The new model has been calibrated based on data in the literature as well as provided by Intel [5]. It is clear that Coulombic scattering effects contribute to deviations from the Universal Mobility Model curves. We have added this contribution to the Lombardi model and demonstrated the applicability of the improved formulation.
In parallel with the model implementation work we have worked in collaboration with Don Scharfetter (Intel) in bringing up the third version of BSIMjr. This code provides a unified means to compare both experimental and simulated data from MOS devices. In particular, the methodology used in BSIMjr is especially good for helping to isolate the effects of parasitics from the intrinsic device behavior. During this contract we installed BSIMjr at Stanford and interfaced the output of PISCES to BSIMjr's data structure.
Mixed-mode simulation---This subtask is investigating the loose coupling of circuit simulation (SPICE) and device simulation using PISCES. However, any numerical device simulator can be easily used in a mixed-mode format provided that two conditions are met: 1) the device simulator must be able to provide the low frequency susceptance matrix and 2) two device simulator specific routines must be written to generate an input deck for the simulator and to read the results of the simulation. Because of many similarities between device simulators, pre-existing routines for Stanford PISCES provides a reasonable starting point. Numerical devices with up to 10 nodes may be used in the present implementation. The code has been tested for dc, ac, and transient analysis techniques. In addition, a means by which SPICE can directly control the temperature of the PISCES simulation has been developed, thus allowing another degree of freedom. In addition, new SPICE .model card parameters were added to support specific needs for device simulator interfaces. In conjunction with these additions, the mixed-mode code now utilizes the SPICE .nodeset card and .ic card more efficiently. All these additional capabilities aid in the convergence for complex circuits and hence, reduce simulation time when used.
Tests have been performed for a variety of circuits (amps, inverters, and ring oscillators) and using different device models (BJT's, MESFET's, and MOSFET's). As an example, a 5 stage ring oscillator using 5 copies of PISCES runs on a network of SUN SPARCstations. More complex and larger circuits have been tried to pinpoint problem areas. The most interesting of the examples is the simulation of a six transistor SRAM cell. The circuit and device cross section was based on the layout and 3D solid modeling information supported under the Manufacturing Science contract. This capability allows investigation of how different layouts affect the circuit performance. In order to overcome computational limitations of mixed-mode simulation, better means for parallelization must be incorporated into code. One mechanism for such improvement is PVM (Parallel Virtual Machine) which permits a network of UNIX computers to be used as a single parallel computer.
[2] L. So, D. Chen, Z. Yu, R.W. Dutton, "Improvement of Initial Solution Projection in Solving General Semiconductor Equations Including Energy Transport", SISDEP Proceedings, Sept. 7-9, 1993, Vienna, Austria.
[3] L. So, D. Chen, Z. Yu, R.W. Dutton, "Dual Energy Transport Model for Coupled Lattice and Carrier Systems", TECHCON '93, Sept. 28-30, 1993, Atlanta, Ga.
[4] R.J.G. Goossens, S. Beebe, Z. Yu, R.W. Dutton, "An Automatic Biasing Scheme for Tracing Arbitrary Shaped I-V Curves", IEEE Trans. on CAD, Vol. 13, No. 3, March 1994.