Stanford Profile Emulator for Etching and Deposition
in IC Engineering (SPEEDIE)
The etch and deposition simulator SPEEDIE
[2] is intended to simulate two
dimensional profile evolution during etching and deposition in gaseous systems.
By two dimensional evolution we mean structures that can be represented by a 2D
representation either because they are cylindrically symmetric or because one
of their dimensions is "infinitely long," i.e., holes (vias) or long trenches.
Note that 3D particle movement is considered. The etching part of SPEEDIE is
based on a previously reported etch simulator [1][6], that was completely
rewritten and numerous additions were added.
SPEEDIE predicts time evolution of etch profiles using physical models and
parameters extracted from special test structures. The models in SPEEDIE
assume:
- Etch and deposition reactor pressure is below a few Torr, such that gas
phase collisions within the topological features can be ignored because the
mean free path is very large in comparison with the characteristic geometrical
dimension of IC devices.
- The fluxes for three types of species are calculated:
ions, chemical radicals, and deposition precursors.
- Multiple transport mechanisms that are modeled include direct gas phase
fluxes (1), neutral adsorption/re-emission (3), ion induced redeposition (6),
surface diffusion (2), and ion reflection.
SPEEDIE modules:
- IONTRANS - computes the ion angular and
energy distributions for plasma etch and deposition simulations.
- ETCHDEPO - advances the profile surface
based on the flux calculations and etch/deposition rate computation.
Examples
Interesting examples of what SPEEDIE has modeled:
- Animation of Physical Etching Simulation
- CVD Copper Deposition - work by Cho, Kang, and Wong
- LPCVD Oxide Modeling - work by IslamRaja, Rey, McVittie,
Capelli, and Saraswat
- LPCVD Conformality Mechanisms - work by Chang, McVittie, and Saraswat
- PECVD Oxide Deposition - work by Chang, IslamRaja, McVittie, and Saraswat
- PECVD Nitride Deposition - work by IslamRaja, McVittie, and Saraswat
- Sputter Etchback Experiments and Simulations - work by Chang, McVittie, Saraswat, Lin, and Leong
The team members are:
James McVittie
Calvin Y. Chang
Jie Zheng
Greg L. Pelts
Ze-Kai Hsiau
Krishna C. Saraswat
Dr. James P. McVittie
Senior Research Scientist
Center for Integrated Circuits, #133
Stanford, CA 94305-4070
mcvittie@glacier.stanford.edu
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