The objective of this meeting was to discuss critical long-term issues for nanoscale transistor research and to identify strategies to address those issues by modeling and simulation. The meeting brought together a heterogeneous group of computationalists and experimentalists from academia, government and industry. A previous SRC-sponsored meeting had already addressed short- and mid-term, TCAD-related issues; the objective for this meeting was to examine longer term challenges and opportunities. Four sessions of presentations followed by discussions addressed the following questions:
1) What are the important problems?
2) What is the underlying theory?
3) How should existing simulation tools be extended and new tools created? and
4) How should we collaborate and share results?

One overall conclusion was that important device issues for the future are broader than those considered in the past. To address new issues, modeling and simulation must learn to work at the quantum and atomic scales. Doing so will help address challenges that threaten to slow progress, but the real opportunities may lie in learning how to engineer devices, even new devices, at the atomic scale. Extensive and energetic discussion about the need for atomic scale modeling, and the various conceptual as well as computational challenges, highlighted numerous open research challenges that cannot be reduced to a roadmap for university research. As the computational community embarks on this effort, the focus should not be on building new kinds of tools, but rather on solving important problems and inventing new solutions. Detailed models are tools for understanding and invention; but they should also guide the evolution and development of engineering models, even compact models. To realize the full potential of modeling and simulation, it needs to be coupled with experimental efforts into closer working collaborations. Roadblocks to achieving closer coupling include:
1) reduced government funding for long-term semiconductor research,
2) an overall misconception about "Roadmap, ergo est" (if it's on the Roadmap it's not research)
3) difficulty in software engineering to support collaboration and plug-and-play physics for advanced semiconductor simulations.

This report lists the specific conclusions and recommendations from the meeting followed by suggestions for how DesCArtES and the SRC can respond. The full report indicates how these recommendations were arrived at. It contains copies of the speakers' overheads as well as a summary of each session and its associated discussion. Enormous challenges loom near the end of the Roadmap, and these must be addressed by every means available. The conclusions and recommendations from this meeting provide a basis for DesCArtES and the SRC to plan efforts that mobilize the computational electronics community to respond to the grand challenges of semiconductor technology.

1) Future device simulation must address a broader range of problems.
Future device simulations should deal directly with atomic scale structure, fluctuations, and discrete charge effects. Efforts to treat reliability by simulation should also be explored. Tunneling through oxides and from band-to-band is increasingly important, and contacts are becoming an integral part of the device and should be dealt with directly. Other effects can be catalogued; the real issue is identifying the critical problems and addressing them by simulation promptly, so that the results can guide technology development.

2) Computational electronics should emphasize problem-solving and invention.
Building simulation tools and matching measured data should not be the sole emphasis. Identifying and solving important problems, inventing devices, proposing experiments, etc. should receive more emphasis. The product of such research will be a solution to a problem, a deeper understanding of an issue, a proof-of-concept for a new idea, or a proposal for new experiments, rather than solely the development of a software tool. New software tools and numerical algorithms continue to be needed, but broader metrics for success are needed.

3) Computational electronics must work more closely with experimentalists.
Working more closely with experimentalists will help focus work on important problems and provide the data needed to test models. Development of a significant new tool or numerical method is often the by-product of solving an important problem. This issue is more difficult for universities to address than for industry, but it is an important one.

4) Simulations should capture quantum and atomic scale effects.
"Well-tempered MOSFETs" should continue to operate in an essentially classical (i.e. non-quantum) manner for some time, but to comprehend atomic scale effects, fluctuations, reliability, etc., full quantum simulation tools are essential. They are needed to understand the detrimental effects of atomic scale fluctuations and to interface to atomic scale process models. More importantly, answers to the critical long-term issues may lie in learning to engineer electronic devices on an atomic scale, and simulations may help us understand how to. This work is still at the frontier; no roadmap is possible; many approaches and issues need to be explored and understood.

5) Current tools must evolve and new tools may be necessary.
Since problems are addressed by the simplest technique that captures the relevant physics, a range of tools will continue to be necessary. Existing tools should continue to be developed and extended as should efforts to understand each tool's role and limitations. New tools may be needed, but beyond the NTRS, it is not clear what the right tools are or what new tools are needed. Investments should be made so that there are options to choose from. Ways to bridge the gap between the capabilities of the latest research codes, often developed at universities, and those available from vendors should be explored. Detailed tools should act as a "laboratory" for the development of new phenomenological models, including new compact models based on sound physics for nanotransistors.

6) Techniques for speeding new code development should be broadly applied.
The development of new simulation tools is a slow process requiring many person-years of effort, but the pace of technology development is quickening. The use of problem-solving environments, off-the-shelf components, scripting approaches, and modern programming methodologies should be accelerated. Codes can be shared better and existing codes may be adapted to new problems. Universities can still address significant computational problems, but it is unrealistic to expect the resulting codes to have industrial-strength in terms of user interfaces, visualization, robustness, etc. The problem solved or understood, the device invented, or the approach or algorithm demonstrated should be regarded as the primary research product and the software tools as a proof-of-concept demonstration.

CMOS scaling is a well-understood optimization problem; it is unlikely that new modeling and simulation initiatives could significantly affect the course of progress during the next 5-10 years. Looking further, however, a slowdown in progress is anticipated. A portion of the modeling and simulation community should be charged with addressing the most significant long-term challenges by creative, simulation-driven solutions. To be effective, the work must be done in close collaboration with experimentalists, codes must be developed quickly, and the most talented students and researchers must be attracted to the enterprise. The NSF-sponsored DesCArtES, the SRC, and the NASA Ames Research Center each has a role to play in mobilizing the modeling and simulation community to this task.

1) DesCArtES
DesCArtES provides a forum in which the computational electronics community can meet, discuss, debate, and collaborate. Since one of the major focuses of DesCArtES, atomic scale simulations, is a critical need identified by the workshop, it will be natural for DesCArtES to provide leadership in this area. Work at Stanford (ALAMODE) and at the Center's partner, Lucent Bell Labs (PROPHET) addresses the code-building efficiency issues identified as critical. In the past, the Center's predecessor (NCCE) played an important role in standardizing carrier transport models; it should plan to play a similar role in the future. The Center's work on web-based simulation, collaborative environments, and distributed visualization may be effective in fostering collaborations between computational researchers and in connecting computationalists and experimentalists. As the Center plans second and third year activities, these issues will be revisited and plans will be suitably refined.

2) SRC
The SRC has an important role in supporting near- and mid-term TCAD research, but it can also begin orienting a portion of the modeling and simulation effort to long-term challenges. It can help broaden the problems addressed by computational electronics, support efforts to understand and model atomic scale effects, while at the same time seeing that present-day tools continue to evolved. Fresh approaches should also be explored. (For example, phenomenological models that begin at the ballistic end rather than at the collision-dominated end.) The SRC can also encourage computationalists and experimentalists to work more closely together, perhaps by encouraging joint proposals focused on an important problem. (This may be one way to address the issue of getting experimental data to computationalists in universities.) The SRC could also support activities to increase the productivity of code building. Focussed technical meetings (so-called Topical Review Meetings) could help identify issues, gaps in understanding, and limitations of current tools. It can also encourage the use of computation to solve problems and invent new devices by broadening the measure of success for TCAD research.

3) Third NASA Ames Device Modeling Workshop
NASA Ames Research Center combines activities on molecular electronics (e.g. carbon nanotubes) with research on nanoscale silicon transistors. These two communities now share a common interest on electronic conduction at atomic and molecular scales and should be able to learn much from each other. With its strong ties to both communities and its location in silicon valley, NASA Ames is positioned to bring these two communities together. The Third Device Modeling Workshop to be held in the summer of 1999 is now being planned as a follow up to this workshop. It will bring two communities together to discuss nanoscale electronic devices, both silicon transistors and molecular electronic.

4) Gedanken Assessment of Ultimate MOSFET Physics and Simulation
During the course of the meeting, it was suggested that an examination of a set of hypothetical devices designed to be "well-tempered MOSFETs" would be a useful exercise. The intent is to sort out the role and limitations different simulation approaches and to develop a deeper understanding of the physics of ultimate MOSFETS, not to simply compare I-V characteristics. Dimitri Antoniadis of MIT has agreed to design a set of devices by drift-diffusion simulation beginning at the 250 nm node where data is available and decreasing as far as possible. Mark Lundstrom of DesCArtES will assist. Depending on how the project progresses, it may be possible to conduct a session on this topic at the NASA Ames meeting or to conduct an SRC Topical Review Meeting on the subject. If successful, these kinds of studies could become a regular way for the community to test models and explore the physics of advanced devices.

5) Compact Modeling Initiative
The need to connect the developers of compact models to the computational electronics community so that physically detailed models can serve a the "laboratory" for the development of new compact models was highlighted as an important, but unmet need. The goal is to make compact models less empirical by developing new models that capture the essential physics of nanotransistors. This may require new approaches as opposed to the addition of effects to existing models. Bob Dutton of DesCArtES and Don Scharfeter of Intel are exploring ways to follow up on this suggestion.