Zakir Sahul
Zakir Sahul is currently working towards the Ph.D degree in Electrical
Engineering at Stanford University. His research area is in
grid
algorithms for semiconductor process simulation and his general
professional interest is in computation for electrical and
bioelectrical applications. He recieved the B.S. degree from the
University of Michigan at Ann Arbor in 1989 and the M.S. degree from
Stanford University in 1992.
Zak has held summer positions at IBM, TI and HP in 1989, 1991, and
1993 respectively. At IBM, he developed software for banking
applications. At TI, he commenced work on grid generation and at HP,
he modeled optoelectronic devices.
In his spare time, Zak does volunteer community service, enjoys reading,
and plays sports.
The following is a list of publications that Zak has authored or
co-authored:
- Z. H. Sahul, R. W. Dutton, and M. Noell,
"Grid and Geometry Techniques for Multi-Layer Process Simulation.
Proc. of 5th Intl Conf on
Simulation of Semiconductor Devices and Processes. Vienna, Austria.
pp 417-420. Sept 1993.
- Z. H. Sahul, E. W. McKenna, and R. W. Dutton.
"Grid Techniques for Multi-Layer Device and Process Simulation."
Proc. of TECHCON'93. Atlanta. Sept. 1993.
- R. W. Dutton, F. Rotella, Z. Sahul, L. So, Z. Yu. ``Integrated
TCAD for OEIC Applications.'' Proc. of SPIE. Physics and Simulation
of Optoelectronic Devices II. Jan 1994. Los Angeles, CA. pp. 80-89.
- Z. H. Sahul, E. W. McKenna, and R. W. Dutton.
"Oxidation Simulation Using a Quadtree Based Grid Generator."
Proc. of Intl Workshop on Numerical Modeling of Processes and Devices
for Integrated Circuits. (NUPAD V). IEEE, June 1994. pp. 155-158
- D. W. Yergeau, Z. H. Sahul, E. W. McKenna and R. W. Dutton,
"
HDF-Vset File Format for
Persistent Storage of Semiconductor Simulation Data."
Technical Report. Integrated Circuits Lab. Stanford University. Dec 1994.
- S. Beebe, F. Rotella, Z. Sahul, D. Yergeau, G. McKenna, L. So, Z.
Yu, K.C Wu, E. Kan, J. McVittie, and R.W. Dutton,
"Next Generation
Stanford TCAD---PISCES 2ET and SUPREM OO7", IEDM 1994 Proceedings,
December 1994, San Francisco, CA, pp. 213-216.
- Z. H. Sahul, K. C. Wang, Z-K. Hsiau, E. W. McKenna, and
R. W. Dutton. ``Heterogeneous Process Simulation Tool
Integration.'' IEEE Trans on Semiconductor
Manufacturing. Feb 1995.
- H. Park, P. Smeys, P. Griffin, Z. Sahul, K.C. Saraswat, R.W. Dutton,
and H. Hwang, ``Quasi-3D Modeling of Sub-Micron LOCOS Structures,''
Submitted to IEEE Trans on Semiconductor Manufacturing. Feb 1995.
Integrated Circuits Laboratory
Stanford University
Stanford, CA 94305-4055