Modeling on-chip and off-chip interconnects. Developing accurate
models of interconnect structures. Evaluating the effect of
parasitics on signal speed and integrity.
Create 2-D and 3-D models of interconnect structures found in
multi-chip modules (MCM) using Fastcap and Fasthenry from MIT, Raphael
from TMA and XFX from Quad Design. Evaluate crosstalk. Understand
the implications of extracting compact models for SPICE simulations
and compiling design rules for routing and parasitic layout
extraction.
REAL-LIFE
ACTIVITIES