Papers Accepted for Oral and Poster Presentation

[A-B] [C-E] [F-H] [I-L] [M-O] [P-R] [S-T] [U-Z]

Papers are organized alphabetically by the first author's last name.

A - B

Abramo, A. (University of Udine)
#00-079 "Well-Tempered MOSFETs: 1D Versus 2D Quantum Analysis"

Ancona, M. G. (Naval Research Laboratory)
#00-019 "Nonlinear Discretization Scheme for the Density-Gradient Equations"

Aronowitz, S. (LSI Logic Corporation)
#00-030 "Effects of Nitrogen on the Activation/Deactivation of Boron and Indium in N-channel CMOS Devices"

Asenov, A. (University of Glasgow)
#00-090 "Effect of Oxide Interface Roughness on Threshold Voltage Fluctuations in Decanano MOSFETs with Ultrathin Gate Oxide"

Avci, I. (University of Florida)
Poster:#00-051"Model for the Evolution of Dislocation Loops in Silicon"

Banoo, K. (Purdue University)
#00-047 "Direct Solution of the Boltzmann Transport Equation in Nanoscale Si Devices"

Bork, I. (Infineon Technologies)
#00-099 "Appropriate Initial Damage Conditions for 'Three-Stream' Point Defect Diffusion Models"

Bude, J. D. (Bell Labs, Lucent Technologies)
#00-016 "MOSFET Modeling Into the Ballistic Regime"

Bufler, F.M. (ETH Zurich)
#00-001 "Efficient Monte Carlo Device Simulation with Automatic Error Control"

C - E

Chakravarthi, S. (Boston University)
#00-064 "Modeling of Boron Deactivation/Activation Kinetics during Ion-implant Annealing"

Charlet, F. (LETI)
#00-017 "Extraction of (R,L,C,G) Interconnect Parameters in 2D Transmission Lines Using Fast and Efficient Numerical Tools"

Chung, W-Y. (Samsung Electronics Co. Ltd.)
#00-085 "Integrated Simulation of Equipment and Topography for Plasma Etching in the DRM Reactor"

Connelly, D. (Motorola Digital DNA Labs)
#00-046 "Improved Device Technology Evaluation and Optimization"

Egley, J.L. (Motorola Inc.)
Poster:#00-018 "SOI Related Simulation Challenges with Moment Based BTE Solvers"

Eikyu, K. (Mitsubishi Electric Corporation)
Poster:#00-041 "Extraction of the Physical Oxide Thickness Using the Electrical Characteristics of MOS Capacitors"

Endoh, T. (Tohoku University)
Poster:#00-072 "A High Signal Swing Pass-Transistor Logic Using Surrounding Gate Transistor"

Ezaki, T. (NEC Corporation)
#00-049 "Simulation of Hot Hole Currents in Ultra-thin Silicon Dioxides: The Relationship Between Time to Breakdown and Hot Hole Currents"

F - H

Fastenko, P. (Boston University)
#00-065 "Modeling of Initial Stages of Annealing for Amorphizing Arsenic Implants"

Füllenbach, T. (German National Research Center for IT)
Poster:#00-067 "Application of an Algebraic Multigrid Solver to Process Simulation Problems"

Goo, J-S (Stanford University)
Poster:#00-061 "Guidelines for the Power Constrained Design of a CMOS Tuned LNA"

Han, Z. (University of Maryland)
#00-057 "2-D Quantum Transport Device Modeling by Self-Consistent Solution of the Wigner and Poisson Equations"

Hane, M. (NEC Corporation)
#00-050 "Di-interstitial Diffusivity and Migration Path Calculations Based on Tight-Binding Hamiltonian Molecular Dynamics"

Hioki, M. (Tohoku University)
#00-071 "An Analysis of Program and Erase Operation for FC-SGT Flash Memory Cells"

Hu, Y. (Oregon State University)
#00-040 "Periodic Steady-State Analysis for Coupled Device and Circuit Simulation"

I - L

Ieong, M. (IBM)
#00-055 "DC and AC Performance Analysis of 25nm Symmetric/Asymmetric Double-Gate, Back-Gate and Bulk CMOS"

Iverson, R.B. (Rensselaer Polytechnic Institute)
#00-011 "A Multi-Scale Random-Walk Thermal-Analysis Methodology for Complex IC-Interconnect Systems"

Jungemann, C. (Universität Bremen)
#00-015 "Spatial Analysis of the Electron Transit Time in a Silicon/Germanium Heterojunction Bipolar Transistor by Drift-Diffusion, Hydrodynamic, and Full-Band Monte Carlo Device Simulation"

Kim, Y-H (Samsung Electronics Co. Ltd.)
#00-083 "CHAMPS (CHemicAL-Mechanical Planarization Simulator)"

Kusunoki, N. (Toshiba Corporation)
#00-036 "A Novel Simulation Method for Oxynitridation and Its Re-oxidation"

Lee, K. (SAIT)
Poster:#00-063 "Prediction of SiO2 Sputtering Yield Using Molecular Dynamics Simulation"

Lee, S. (Hankuk University of Foreign Studies)
Poster:#00-032 "A New Method to Determine Channel Mobility Model Parameters in Submicron MOSFET's using Measured S-Parameters"

M - O

Ma, Y. (Tsinghua University)
#00-004 "Comprehensive Analytical Charge Control and I-V Model of Modern MOSFET's by Fully Comprising Quantum Mechanical Effects"

Matsuzawa, K. (Toshiba Corporation)
Poster:#00-087 "Monte Carlo Simulation of Current Fluctuation at Actual Contact"

Matsuzawa, K. (Toshiba Corporation)
Poster:#00-086 "Simulation of Self-Heating and Contact Resistance Influences on nMOSFETs"

Moens, P. (Alcatel Microelectronics)
Poster:#00-091 "Development of an Optimized 40V pDMOS Device by Use of a TCAD Design of Experiment Methodology"

Mokhberi, A. (Stanford University)
#00-062 "Kinetics of Boron Activation"

Mudanai, S. (University of Texas at Austin)
#00-008 "Modeling of Direct Tunneling Current Through Gate Dielectric Stacks"

Ogawa, M. (Kobe University)
#00-100 "Multi-Band Simulation of Interband Tunneling Devices Reflecting Realistic Band Structure"

Ohta, T. (Semiconductor Leading Edge Technologies, Inc.)
#00-092 "A Simulation System for Capacitance Variation by CMP Process Including Defocus Effect"

Oldiges, P. (IBM Corporation)
#00-053 "Modeling Line Edge Roughness Effects in sub 100 Nanometer Gate Length Devices"

Ouyang, Q. (University of Texas at Austin)
#00-009 "Two-Dimensional BAndgap Engineering in Novel Si/SiGe pMOSFETS with Enhanced Device Performance and Scalability"

P - R

Palankovski, V. (TU Vienna)
Poster:#00-097 "Analysis of HBT Behavior After Strong Electrothermal Stress"

Palestri, P. (University of Udine)
#00-073 "A Monte Carlo Technique to Investigate Signal Delays of Advanced Si BJT's up to High Currents"

Palestri, P. (University of Udine)
#00-074 "Coupled Monte Carlo Simulation of Si and SiO2 Transport in MOS Capacitors"

Park, J-K (Samsung Electronics Co. Ltd)
#00-084 "An Exhaustive Method for Characterizing the Interconnect Capacitance Considering the Floating Dummy-Fills by Employing an Efficient Field Solving Algorithm"

Pennington, G. (University of Maryland)
Poster:#00-058 "A Physics-Based Empirical Pseudopotential Model for Calculating Band Structures of Simple and Complex Semiconductors"

Pladdy, C. (University of Florida)
Poster:#00-052 "Optimum Node Positioning in Adaptive Grid Refinement and the Delauney-Voroni Algorithm"

Quay, R. (Frauenhofer Institute of Applied Solid-State Physics)
#00-096 "Simulation of Gallium-Arsenide Based High Electron Mobility Transistors"

Rajendran, K. (IMEC vzw)
Poster:#00-104 "Simulation of Boron Diffusion in Strained Si1-x Gex Epitaxical Layers"

Reggiani, S. (Universita di Bologna)
#00-089 "Two-qbit Gates Based on Coupled Quantum Wires"

S - T

Sanchez, J. E. (University of Florida)
Poster:#00-027 "Noise Simulation of Semiconductor Devices Under Large-Signal Periodic Conditions"

Saxena, S. (PDF Solutions)
#00-045 "Circuit-Device Co-design for High Performance Mixed-Signal Technologies"

Schoenmaker, W. (IMEC)
#00-043 "Nuclear Modeling of Quantum Gate Leakage Currents with Sensitivity Analysis"

Spinelli, A.S. (Universita degli Studi dell'Insubria)
#00-054 "Quantum-Mechanical 2D Simulation of Surface- and Buried-Channel p-MOS"

Stiebel, D. (Fraunhofer Institut für Integrierte Schaltungen)
#00-022 "Modeling Boron Activation and Diffusion in the Presence of {113}-Defects and Boron-Interstitial Complexes"

Suetake, M. (Hiroshima University)
Poster:#00-042 "HiSIM: A Drift-Diffusion-Based Advanced MOSFET Model for Circuit Simulation with Easy Parameter Extraction"

Sverdrup, P. G. (Stanford University)
#00-068 "Sub-Continuum Thermal Simulations of Deep Sub-micron Devices under ESD Conditions"

Thalhammer, R. (Munich University of Technology)
Poster:#00-026 "Optimizing Free Carrier Absorption Measurements for Power Devices by Physically Rigorous Simulation"

Tornblad, O. (Stanford University)
#00-101 "Modeling and Simulation of Phonon Boundary Scattering in PDE-based Device Simulators"

Tosaka, Y. (Fujitsu Laboratories Ltd.)
Poster:#00-056 "Simulation of Multiple-Bit Soft Errors Induced by Cosmic Ray Neutrons in DRAMs"

U - Z

Wagner, M. (Hitachi Europe Ltd.)
#00-088 "A Fast Three-Dimensional MC Simulator for Tunneling Diodes"

Wang, X. (University of Texas at Austin)
#00-012 "Electron Transport Properties in Novel Orthorhombically-strained Silicon Material Explored by the Monte Carlo Method"

Yoon, S. (Inha University)
Poster:#00-077 "A Mesh Generation Algorithm for Complex Geometry"

Yoon, S. (Inha University)
#00-075 "An Extracting Capacitance in a Stacked DRAM Cell by Numerical Method"

last update: May 9, 2000