Dr. Cao received his Bachelor and Master of Science degrees, and Ph.D.,
all in Electrical Engineering at Stanford University in 2005, 2006, and 2010,
respectively.
He is the recipient of the Best Paper Award at 2010 IEEE International
SOI Conference, the Best Student Paper Award at 2010 IEEE International SOI
Conference, and received Best-in-Session Award at 2010 SRC TECHCON Conference.
He has been awarded the SRC Global Research Collaboration fellowship, AMD/Stanford
graduate research fellowship, NSF-Nanohub fellowship,
and various scholarships. Most recently he received the Outstanding
Contribution TPC Award at the 2013 International EOS/ESD Symposium.
Dr. Cao has co-authored various international journal and conference
proceeding publications, including invited publications and talks. He
co-developed four semiconductor interactive simulation tools with usage from
over thirty countries for Nanohub, a premier global
computational nanotechnology initiative funded by National Science Foundation.
Dr. Cao has been the Chair of 2013
International EOS/ESD Symposium Electronic Design Automation committee, and Co-Chair
of 2013 International Reliability Physics Symposium ESD/Latch-up committee. For
the past three years, he has served on the technical program committee for the
aforementioned conferences, the International ESD Workshop, as well as foundry
member on various industry EDA/ESD working groups. He is an Executive Committee
member of IEEE Electron Devices Society, Santa Clara Valley and the Vice Chair of 2014.